Semiconductor devices such as MOSFET using field electrodes for charge compensation have become very popular during the last decade as they offer a significant improvement of the area-specific resistance. The devices typically use a stripe design where the field electrodes and the mesa regions containing the gate electrodes are formed in the shape of long stripes which run parallel to each other.
More recent concepts employ a cell design having a hole-like deep trench, also referred to as spicular trench, containing the so-called field-plate in the centre of a given transistor cell. The deep trench containing the field-plate is surrounded by a separate gate trench. This cell design, also referred to as needle trench design due to the central deep field-plate shaped as oblong electrode, offers a larger cross-sectional area for the mesa region around the spicular trench than the stripe design. A larger cross-sectional area for the mesa is believed to further reduce the overall on-state resistance RON of the semiconductor device.
For illustrating purposes, reference is made to FIGS. 11A and 11B which show schematics of unit cells of the stripe design in FIG. 11A and of the needle trench design in FIG. 11B. Assume that the unit cell has dimensions defined by a in length and width direction. We further assume that the width of the trench is a−w with w being the width of the mesa region. A trench for the field plate in the stripe design assumes an area equal to a·(a−w). Different thereto, the spicular trench only assumes an area of (a−w)2 which means that the area left for the mesa region is larger in the needle trench design than in the stripe design. A larger cross-sectional area of the mesa results in a lower on-state resistance RON.
As with semiconductor devices of the stripe design, semiconductor devices having transistor cells of the needle trench design include a so-called edge termination region which surrounds an active region of the semiconductor device. The active region of a semiconductor device includes the active transistor cells which carry the electric current through the semiconductor device and which can be controlled by applying a gate voltage. The edge termination region is provided to maintain and improve the blocking capabilities of the semiconductor device when operated in blocking mode or off-state.
A breakdown of the semiconductor device may particularly happen at the outer rim of the semiconductor substrate of the semiconductor device due to crystal defects and a locally increased electrical field. The edge termination region is provided to control the relief of the electric field so that the occurrence of high electric fields at the outer rim or other regions susceptible to electrical breakdown can be avoided.
In view of the above, there is need for further improvement.